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RF Activities @ SI&C
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RF Activities @ SI&C
INDEX
1. INTRODUCTION
1.1 Organization
1.2 R&D&I overview in the RF Group
2
2
3
2. PASSIVE COMPONENTS FOR RF APPLICATIONS
2.1 Objectives and work description
2.2 Collaboration with other institutions
4
4
6
3. SYSTEM IN PACKAGE RFICs: MECODIS-RF
3.1 Objectives work description
3.2 VCO modules
3.3 SiP RFIC front end: BPSK2ASK converter
3.4 Receiver demonstrator
10
10
12
13
16
4. EUROPEAN PROJECTS
4.1 The MAXIMA project
4.2 The Micropyros project
18
18
19
5. INNOVATION AND TRANSFER PROJECTS
5.1 Antenna Optimization (austriamicrosystems AG)
5.2 Vehicle Remote Keyless Entry (Lear Corporation)
20
20
21
6. PUBLICATIONS
24
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RF Activities @ SI&C
1. INTRODUCTION
1.1 Organization
• RF Group history
RF activities at the University of Barcelona started in 1994, since then the RF group
have been involve in an increasing number of research and development projects,
covering different aspects of RF and microwave fields. In 1997 the RF groups together
with other research groups of the Electronics Department, University of Barcelona,
form the Instrumentation and Communication Systems laboratory (SIC), which was
recognised as an excellence research group by the autonomous government of
Catalonia. Nowadays, the Radio Frequency Group is one of the SIC’s most active
units.
• RF Group Personnel
-
Dr. José María López-Villegas (Director)
Dr. Javier José Sieiro Córdoba
Dr. José Cabanillas Costa (At present visitor researcher at the University
of Michigan).
Mr. Aitor Osorio Martí (4th year PhD student)
Mr. Gabriel Macias Montero (4th year PhD student)
Mr. Nicolás Grijalba (DEA student)
Ms. Neus Godino Amado (Master thesis student)
Mr. Tomás Carrasco Carrillo(Master thesis student)
• RF Group, design and test capabilities
The RF Group is equipped with different design and simulation tools, allowing the
analysis:
•
At the physical level:
o
o
o
•
At the Circuit Level
o
o
•
MOMENTUM planar Electromagnetic Solver from Agilent
Technologies.
ANSYS 3D Finite Element Method solver with mechanical, thermal
and electromagnetic modules.
Rencom XFDTD Finite Differences Time Domain 3D Electromagnetic
Solver.
Agilent Technologies Advance Design System (ADS) including DC,
AC, S parameters, Harmonic Balance, Transient and Envelope
simulators, all of them with MOMENTUM co-simulation interfaces.
CADENCE design environment.
At the System level
o
o
MATLAB Simulink.
Agilent Technologies Ptolemy, including co-simulation interfaces to
ADS transient and Envelope simulators.
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Sistemas d’Instrumentació I Comunicacions – RF Group
The RF group has also measurement and test capabilities in both frequency and
time domains. The available equipment and facilities include:
•
•
•
•
•
•
•
•
•
•
HP 8591E and HP E4407B Spectrum analyzers, covering the range from 9
KHz to 26.5 GHz.
HP 8753C and HP 8720C Vector Network Analyzers, covering the range
from 300 KHz to 20 GHz.
Agilent Infinium Oscilloscope 4 channels, 8 GSa/s for time measurements up
to 2.25 GHz.
HP 8657A an Agilent E4421B Signal Generators up to 3GHz.
HP 8970B Noise figure meter, with noise source up to 18 GHz.
Probe station for on wafer measurements.
PCB prototyping unit.
Wedge bonding apparatus.
Access to wire bonding and Flip-Chip mounting techniques, at the Spanish
Microelectronics Centre (CNM).
Access to other departmental and University equipment and services.
1.2 R&D&I overview in the RF Group
The increasing demand of portable telecommunication systems and the great
interest in wireless interconnectivity, driven by a big mass market, are promoting a
great research effort in the field of Radio Frequency Integrated Circuits (RFIC’s). At the
beginning of the nineties’, RFIC was in his infancy: technology shrunk down to the limit
of doing RF technology a cheap one. One decade later, it is quite easy to see RFIC
technology in our day-life.
Since the formation of the RF Group, RF activities have evolved from the basic
physical research on components and materials till the true design of RF systems. This
work can be grouped in three major areas based on the R&D&I scheme:
•
•
•
Basic research: activities are devoted to the design of new RFIC’s. Up to
now, interest has been centred in three areas: modelling of passive
components, particularly inductors and transformers; design of basic RF
circuits with new topologies (VCO, mixers, ILO, etc); and exploration of new
communication transceiver architectures.
Development: Due to the previous basic research work, there have been an
important number of development activities. Among them, it is worth to point
out the development of: (1) RF libraries for passive components; (2)
Optimisation software techniques for inductors and transformers; (3) codesign methodology for RF based on the SiP concept; (4) packaging
techniques suitable for RF applications.
Innovation and Transfer: In this context, the development of RF systems
for different applications (i.e. automotive, communications, domotics &
offimatics or biomedical), in collaboration with several institutions and
companies, is also an important part of the RF activities carried out at SIC.
The next sections summarise the different projects and collaborations of the RF
Group that collect the work in RF design already done or in progress.
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RF Activities @ SI&C
2. PASSIVE COMPONENTS FOR RF APPLICATIONS
Most of the work related to the study and modelling of RF passive components for
RF applications where supported by the Spanish Commission for Science and
Technology (CICYT) in the Information and Communication Technology program under
reference: TIC98-0836-C02-01. The title of the project was Design Methodology of
Silicon Integrated High Performance Passive Components for RF Applications.
2.1 Objectives and work description
The main objective of the project was the development of a standard design
methodology of silicon integrated high performance passive components for Radio
Frequency applications. For achieving it, a one metal Standard CMOS process
complemented with three additional metals Multi Chip Module Technology was used to
perform the whole set of integrated passive components. To improve as much as
possible the performance of the integrated inductors and transformers (i.e. self
resonant frequency and quality factor), a post-processing silicon micromachining
module was employed to selectively remove the substrate underneath these
components. Figure 1 shows an example of an integrated inductor performed using the
above technological combination. Figure 2 illustrates the improvement of the quality
factor as a consequence of the silicon etching under the inductor structure.
Fig 1. SEM photograph of a square spiral integrated Inductor.
Surface micromachining has been used to remove the bulk underneath the coil.
Fig 2. Inductor quality factor: on silicon (  ), after etching (  )
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Sistemas d’Instrumentació I Comunicacions – RF Group
In order to further improve the inductor quality factor a new approach to the design
of these components has been proposed. The method is based on the analysis of the
inductor series resistance taking into account not only ohmic losses, but also the
magnetically induced losses due to Eddy currents. The result of this analysis is an
algorithm which allows minimise the inductors series resistance by finding the optimum
metal strip width for every turn of the inductors coil. The final optimised layout is a multi
width spiral structure as shown on figure 3. The plot in figure 4 is a comparison of the
quality factor of the optimised structure with the quality factor of several constant width
inductors having the same equivalent inductance.
Fig. 3 Optimised inductor layout.
Fig 4. Inductor quality factor: optimised (),
10 µm (), 25 µm (),40 µm ().
A first version of RF design library including these optimised passive components
together with resistors, capacitors and active devices has been implemented. Using
this library, some demonstrator circuits have been designed. As an example, figure 5
shows the layout of one of these circuits, corresponding to a double balanced mixer
performed using a diode ring and micromachined transformers.
(a)
5
(b)
Fig. 5. Micromachined double balanced Mixer circuit:
(a) microphotograph and (b) schematic.
RF Activities @ SI&C
Figure 6 and 7 shows the obtained spectrum at the RF port before and after
substrate etching, respectively. Before substrate removal the obtained LO-RF isolation
(measured as the amplitude of 500 MHz component of the spectra) is about 45 dB,
which in the range of previously reported data. After substrate etching, the isolation
improves in more than 20 dB, leading to a final isolation figure of more than 75 dB for
the micromachined mixer at 500 MHz.
Fig. 6. RF spectrum of a non-micromachined
mixer (LO freq. 500 MHz).
Fig. 7. RF spectrum of micromachined mixer
(LO freq. 500 MHz ).
2.2 Collaboration with other institutions
Due to the advances achieved in RF research during this project, two long-term
collaborations have been established with other academic institutions through the
interchange of PhD students. Hereafter, a brief explanation of the different circuit
projects is given.
• Collaboration with the University of Michigan (Ann Arbor).
This collaboration started on May 2000 and its subject was the design and
implementation of two circuits: (1) a low-noise VCO and (2) a quadrature RF VCO. The
different designs were realised using the CMOS BC35 technology from Conexant.
(a)
(b)
Fig. 8. CMOS Transformer-based VCO: (a) schematic; (b) microphotograph.
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Sistemas d’Instrumentació I Comunicacions – RF Group
TABLE 1: SPECS OF TRANSFORMER-BASED VCO.
Vdd
2.5V
Idd
14 mA
Icore
4.5 mA
F0
1.7 GHz at 2.5 V
Tuning
107 MHz at 0-2.5 V
Pout
0.5 mW (differential.)
Pn
Pushing
-138 dBc/Hz at
-142 dBc/Hz at
-152 dBc/Hz at
600 kHz
1 MHz
3 MHz
1.6MHz/V at Vdd=2.5V
0.5MHz/V at Vdd=2.6V
The first design, shown in figure 8, is a cross-coupled PMOS and NMOS VCO. The
key component is the transformer placed at the core of the resonant tank. From
electromagnetic and circuit simulations, it can be shown that the overall quality factor of
the resonator can be improved; thus, one can expect a better phase noise
performance. Circuit specs were measured at Agere Systems in the base-station group
(Dr. Jenshan Lin) using the Agilent E5500 phase noise measurement system with the
FM discrimination method. Table 1 shows the performance of the circuit.
The second design is a quadrature oscillator. The novelty of the circuit lies in the
coupling of two matched cross-coupled oscillators through the connection of both
common mode points with an inverter transformer. Due to the non-linear behaviour of
the circuit, a synchronisation mechanism appears and both oscillators are locked each
other with a phase difference of 90º between their outputs. In figure 9, it is shown the
circuit implementation.
Fig. 9. Quadrature CMOS VCO: (a) Schematic; (b) Microphotograph.
The outputs were measured with a 26 Gsamples oscilloscope using a probe (G-SG-S-G) and converting the differential signal into a single-ended one by means of a 0180º power-combiner (or directional coupler). In figure 10, quadrature outputs are
shown with an error of ±1º.
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RF Activities @ SI&C
Fig. 9: Quadrature signals in the time domain.
• Collaboration with DIMES (Delft University of Technology).
This collaboration started in November 2000 and the subject was divided in two
lines: (1) development of compact models for RF inductors; (2) design of LC-based
VCOs using optimised inductors. The first point is related to the extension of the
modelling of passive components developed at SIC. In DIMES, such scalable electrical
models for RF inductors were integrated (C-coded) in a CAD/CAE environment
(Advanced Design System, Agilent Technologies) taking into account the technological
aspects of DIMES03 process (high resistivity silicon substrate 2KΩ·cm and 3µm
Aluminium metal). As a demonstrator, a batch of VCO circuits was designed where the
inductor of the LC-tank was modified in order to check its influence on the overall
performance. Figure 10 shows a Colpitts VCO with optimised layout inductors and its
phase noise performance for the given technology.
HB simulation
-97 dBc/Hz @100KHz
measured
(a)
(b)
Fig. 10: (a) Colpitts VCO; (b) Phase Noise performance.
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RF Activities @ SI&C
3. SYSTEM IN PACKAGE RFICs: MECODIS-RF1
Nowadays, using the state of the art technology it is very difficult to obtain a whole
RF system in monolithic form. Nevertheless, as an alternative, it is possible to combine
together several IC’s fabrication processes and packaging techniques to get a compact
RF system. This concept is named System in Package (SiP).
One of the key issues for success of this approach is technology partitioning. The
best available technology is used to perform each part of the system, getting this way
the best performance at the lowest prize in the smaller package. In this framework, we
can no longer talk about real RF building blocks, implemented using a single
technology and mounted together on a substrate used just for interconnecting
purposes. Instead, a concrete RF function could be implemented using several dies
and part of the carrier substrate. Thus, as important as the technology partitioning is
the spread functionality.
In this context, the Universitat de Barcelona (UB) and the Instituto de
Microelectrónica de Barcelona/Centro Nacional de Microelectrónica (IMB-CNM) started
a co-ordinated project supported by Commission for Science and Technology (CICYT)
in the Information and Communication Technology program (reference: TIC 20012947-C02). The aim of the present project is the development of a Chip/Package codesign methodology for short range RF systems. In the next sections, we will
highlight the main objectives, work description and technical results of the project
3.1 Objectives and work description
The main objective of the project is to develop a Chip/Package co-design
methodology for highly integrated short range RF communication systems. The first
step to achieve this goal is the definition of the technological combination to fabricate
RF systems. Fabrication process involves different available technologies from the
partners, IMB-CNM and UB, as well as from AustrianMicroSystems AG (AMS) and
Delft Institute for MicroElectronics and Submicron Technology (DIMES). A relevant
aspect of the project is the use of high performance embedded passive components in
the carrier substrate, particularly inductors and transformers and, eventually, the
antenna. As demonstrator of the Chip/package co-design methodology capabilities, a
new concept of RF front-end is being developed. The different available processes are:
•
The Multi Chip Module (MCM) process from the IMB-CNM, for
implementing the carrier substrate, including embedded passives,
particularly inductors and transformers.
•
The CMOS, BiCMOS and SiGe processes from AMS, used to implement
the active part of the different RF building blocks.
•
The DIMES03 and DIMES04 Bipolar processes from DIMES also used to
implement the active circuitry of the RF building blocks and some integrated
passives. Eventually, these processes can be complemented with silicon
micromachining post-processing.
•
The Flip-Chip and Wire Bonding capabilities at the IMB-CNM, for
mounting the final RF packaged modules.
1
MEtodología de CODISeño Chip/Encapsulado y su integración para la realización de sistemas RF de
corto alcance, CICYT project TIC 2001-2947-C02.
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Sistemas d’Instrumentació I Comunicacions – RF Group
•
The wedge bonding and PCB prototyping facilities at the Electronics
Department, University of Barcelona (UB), for realising the final text fixtures
required to perform the electrical characterisation.
Once the technological combination is set up, the second objective of the project is
to define technology partitioning and spread functionality rules. Finally, the last
objective is to evaluate the possibilities of the Chip/Package co-design methodology in
RF system design. In other words, take advantage of the versatility of the technological
combination to redesign existing RF building blocks, or even propose new RF circuits
or modules.
As demonstrator of the project a RF front-end module working in the 2.45 GHz
Industrial Scientific and Medical (ISM) frequency band is proposed. There are two main
reasons for this choice:
•
First, RF front-end is a sub-system with full functionality. It is composed of
several RF building blocks which have to be interconnected. Moreover, the
ratio between passive and active devices is much higher than in other
circuits. Thus, a RF front-end is a very suitable sub-system for testing the
Chip/Package co-design methodology.
•
Second, short range RF communication standards IEEE 802.11 (b and g)
and BluetoothTM use the same frequency band. The former is expected to be
standard for Wireless LAN applications while the later is expected to be the
standard for low rate and very short rate communications (i.e. peripheral
control, home environment, in-vehicle applications, etc).
To achieve the project’s objective the work-plan has been divided into 5 workpackages:
W1. Specifications (participants UB, IMB-CNM). The aim of this work-package
is to define the demonstrator characteristics. First the different alternatives for
the front-end architecture should be analysed (superheterodyne, direct
conversion), then the required RF building blocks should be identified and
finally, the advantage of the Chip/Package co-design must be clearly stated.
W2. RF Building Blocks analysis and Design (UB). This work-package is
devoted to the analysis and design of the required RF building blocks for
implementing the final(s) demonstrator(s). Technology partitioning and spread
functionality are fundamental aspects to take into account in this work-package.
Each RF Building block or RF function should be fragmented according to the
available
technological
processes.
Then,
their
performance
and
interconnectivity must be tested using standard design tools (Cadence, ADS).
Special attention should be paid to include the parasitic effects related to the
Flip-Chip mounting process in all the simulations.
W3. Layout Generation (UB, IMB-CNM). The objective of this work-package is
to generate the set of layouts, one for each technology, necessary for
implementing the different RF building block and the whole RF front-end.
W4. Fabrication and Mounting (IMB-CNM). The first task of this work-package is
the fabrication of the different ICs and the carrier substrate, according to the
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RF Activities @ SI&C
previous designs. The second task is the assembling of the RF Building block
and the whole RF front-end modules, using the facilities at the IMB-CNM.
W5. Electrical characterisation and performances test (UB). This last workpackage is devoted to the final test of the prototypes (RF Building blocks and
whole RF front-end). Its first task is the analysis and design of the test fixture
(i.e. PCB design, type of connectors, etc). The second and final task is the final
package assembling and test.
3.2 VCO modules
Two different oscillator topologies have been implemented. One uses two
complementary cross-coupled pairs and an optimised inductor. The other solution only
uses NMOS cross-coupled pair and an integrated and optimised transformer. The
transformer is centre tapered in its common mode to bias the core of the oscillator.
Both topologies are shown schematically in figure 11.
Vcc
Vc
Vc
Vbias
Vbias
(a)
(b)
Vss
(a)
(b)
Fig. 11. Circuit schematic of two VCO modules: (a) complementary cross-coupled
par with inductor and (b) single NMOS cross-coupled pair with transformer.
For implementing the core of the VCOs modules, 0.35-µm CMOS process from
AMS has been used. This process has also been used to perform the capacitive part of
the resonant tanks as integrated PMOS varactors. Figure 12(a) shows a photograph of
one of the fabricated dies.
The substrate carrier has been fabricated on 100 mm diameter glass wafers (Pyrex
7740). Two metal levels with a thickness of 1.5 m have been used as interconnects
and to perform the inductive part of the resonant tanks as embedded inductors and
transformers. Polyamide, 4.5 m thick, has been used as inter-metal dielectric and
passivation layer.
To assure a good attach of the CMOS dies to the carrier substrate, Nickel has been
electroless deposited on all the flip-chip pads. Then, a small ball of soldering material
has been deposited in every flip chip pad of the carrier substrate. After that,
approximate positioning has been used to allocate CMOS dies into the base. Finally,
the whole system has been heated till soldering temperature. The resulting assembly is
shown in figure 12(b).
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Sistemas d’Instrumentació I Comunicacions – RF Group
(a)
(b)
Fig. 12. (a) View of a VCO core circuit; (b) Photograph of the VCO module including
an embedded optimised inductor.
The performance of the VCO module is shown in figure 13. The oscillator tuning
range is shown in figure 13(a), while the oscillator phase noise is shown in figure 13(b).
The oscillation frequency can be varied within a 13% range around the centre
frequency. The module consumes 1.4 mA from a 2.7 V supply and delivers around -2
dBm output power to a 50 Ohms load. Finally, the phase noise is about -100 dBc/Hz at
100 kHz, from a 960 MHz carrier.
-40
960
Phase Noise (dBc/Hz)
Oscillator Frequency (MHz)
980
940
920
900
880
-60
-80
-100
1/f
2
-120
860
0,8
1,2
1,6
2,0
2,4
Tuning Voltage (V)
2,8
10
100
1000
Frecuency offset from 960 MHz carrier (KHz)
(a)
(b)
Fig. 13. (a ) VCO’s tuning range;(b) VCO’s Phase noise.
3.3 SiP RFIC front-end: BPSK2ASK converter
One of the interest points in our study of the VCO modules (see section 2.1) was the
possibility to synchronise the oscillator with a reference signal, provided this signal is
injected in the right place. When the injected signal is close to a harmonic of the
oscillator free running frequency the ensemble is known as super harmonic Injection
Locked Oscillator (ILO). In the locked state, super harmonic ILO’s act as frequency
dividers, being the dividing factor the harmonic order.
13
INVERTER
TRANSFORMER
BIAS
TEE
OUTPUT
INPUT
DC
VARACTORS
BIAS
Oscillator Output (dBm)
RF Activities @ SI&C
0
-20
-40
-60
-80
-100
225
226
227
228
229
Frequency (M Hz)
(a)
(b)
Fig. 14: (a) Circuit schematic of a 2nd harmonic Injection Locked Oscillator ILO
(cross pair bias circuit omitted);(b) Measured output spectrum of a 2nd harmonic ILO
(dotted line is the free running oscillation, continuous line is the forced oscillation for a
452 MHz input signal.
A possible implementation of 2nd harmonic ILO is shown on figure 14(a). The circuit
is a cross pair oscillator, whose resonant tank consists of an inverter transformer and a
pair of varactor diodes. The 2nd harmonic is injected at the centre tap of the
transformer. Ideally, under common mode excitation the transformer acts as a short
circuit, so that the injected signal is found without distortion at the varactors terminals.
There, due to the non linear behaviour of the stored charge and the applied voltage,
the injected signal at frequency 2f mixes with the oscillator signal at frequency close to
f. As a consequence, a new current component appears which modifies the
characteristics of the resonant tank. Thus, the admittance of the varactors is not just
that of the bias capacitance. Additional real and imaginary admittance components
appear which modify the oscillator frequency till it reaches the value of half the
frequency of the injected signal. An example of this synchronisation process can be
seen in figure 14(b).
In addition to frequency division, super-harmonic ILOs also perform phase division.
Thus, for a given injected signal, the output of the locked oscillator could be in any of M
possible phase states, being M the super harmonic order (i.e. Oscillator output phase =
Injected signal phase/M +2πn/M; n=0,..,M-1). In the case of a 2nd harmonic ILO this
leads to a phase uncertainty of π.
Let us now consider that the phase of the injected signal changes in π. According to
the above discussion the output phase of the oscillator will change either in π/2 or π/2. From our analysis of the ILO’s dynamics it is derived that the final value of the
output phase change depends on the ratio between the free running frequency of the
oscillator (prior to the injection) and the final locked frequency. Thus, if the free running
frequency is smaller than the locked frequency, the output phase change is equal to π/2. On the contrary, if the free running frequency is bigger than the locked frequency,
the output phase change is equal π/2. This phase behaviour allows us to define a new
converter circuit, which is able to transform input signal (i.e. injected signals) with
Binary Phase Shift Keying modulation (BPSK) into Amplitude Shift Keying (ASK)
signals.
To understand the new converter functioning, let us consider two 2nd harmonic ILOs
injected by the same input signal. One of them is tuned to have a free running
frequency smaller than the final locked frequency, while the other is tuned to have a
bigger one. In the locking state both oscillators will have the same frequency and their
relative phase could be either 0 or π. According to the above discussion when the input
14
Sistemas d’Instrumentació I Comunicacions – RF Group
phase changes in π, the phase of the output signals of one of the ILO’s changes in π/2
while the other changes in –π/2. That is, if the relative phase was 0 it will become π, or
vice versa. Thus, by adding the outputs of both ILOs we will be able to generate an
interference pattern (ASK signal), which can be constructive (relative phases equal to
0) or destructive (relative phase equal to π) and reproduces the phase changes of the
injected signal.
Figure 15(a) shows a block diagram of the proposed converter circuit. Figure 15(b)
shows its implementation using the available technology platform. The two ILO’s are
located left and right. The attached RFIC’s dies containing active circuitry can be seen
in the lower left and lower right corners. Finally, the power divider and the power
combiner are located top and bottom, respectively. Two surface mount resistors
(centre) have been used to assure a good isolation between ports of the power divider
and combiner.
BPSK Input (2f)
i1
i2
Power divider
ILO 2
ILO 1
Power combiner
o
o2
ASK Output (f)
(a)
(b)
Fig. 15. (a) Block diagram of the BPSK to ASK converter;
(b) BPSK to ASK converter module.
Converter Output (V)
An example of the measured converter performance is shown in figure 16. This
figure displays the amplitude modulated signal at the converter’s output in response to
consecutive phase changes at the input signal. In this case the time between phase
changes is 1 µs. The minimum amplitude is not zero because of the harmonic content
at the outputs of both ILOs.
0,2
0,1
0,0
-0,1
-0,2
0
1
2
3
4
time (µ s)
Fig. 16. Amplitude modulated signal at the converter’s output in response to
consecutive phase changes at the input signal. Time between phase changes is 1 µs.
15
RF Activities @ SI&C
3.4 Receiver Demonstrator
Taking into account the good performance of the BPSK to ASK converter, we have
choose a new architecture for the final demonstrator. The block diagram of the new
receiver is shown in figure 17. This system will be able to coherently demodulate BPSK
signal without the need of an explicit carrier recovery subsystem.
Up to date, most of the RF front-end building blocks have been designed and they
are being fabricated. In this case bipolar technology DIMES04 from DIMES has been
used to implement the active parts, while the MCM technology from the IMB-CNM is
being used to implement the carrier substrate.
Fig. 17. Block Diagram of the proposed RF receiver front-end.
Numerical estimations using Electromagnetic, Circuit and System co-simulations
indicate that demodulation rates up to several tens of Mbits/s can be achieved. An
example of these numerical simulations is shown in figure 18.
Fig. 18. Demodulated output of the new BPSK receiver front-end (bottom) versus
the phase changes of the input signal (top). The carrier frequency is 2.4GHz and the
modulation rate is 54 Mbps.
16
RF Activities @ SI&C
4. EUROPEAN PROJECTS
Thanks to the collaboration with other research groups of the Departament
d’Electrònica (Universitat de Barcelona), the RF group has had the opportunity to
participate in two projects in the III and V Frame Programs of the European Union.
4.1 The MAXIMA project
Inside the III Frame Program, the ESPRIT MAXIMA project was related to the
development of MultiAXIal Monolithic integrated Accelerometer. The SIC group was in
charge of the design and simulation of a pendular-capacitive accelerometer able to
sense the acceleration in the Z direction.
Once implemented, the test set-up should be able to evaluate the sensor under
dynamical conditions. For that purpose, a transmitter circuit in the RF range was
implemented. The circuit was based on a Colpitts oscillator whose frequency depended
on the capacitance variations of the accelerometer. Analysing the variations in the
emitted frequency, the information related to characteristic of the transfer function was
obtained. The results of this work are collected in the PhD Dissertation “Diseño y
Realización de Acelerómetros Capacitivos Pendulares en Silicio Monocristalino”, by O.
Ruiz (Universitat de Barcelona 1996).
4.2 The Micropyros project
Nowadays, there is a big interest in a new kind of silicon microsystems based on the
combination of small propellant quantities placed in micromachinined silicon structures.
With the help of a heater, it is possible to activate the propellant to generate a
pyrotechnical micro-actuation. Since 2000 year, the SIC Group has taken an active
research position under the European project “Development of an Emerging
Technology based on Micropyrotechnics - Applicative Exploration of Energetic
Microsystems: MICROPYROSYSTEM”, (ref. IST-1999-29047) taking the leadership of
one of the workpackages. The system can be overviewed in figure 19.
Fig. 19. Micropyros demonstrator system.
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Sistemas d’Instrumentació I Comunicacions – RF Group
The RF Group has taken the responsability of the design of the wireless-RF
communication module between the pirotechnical array elements and the control unit.
The RF frequency is located in the ISM 868 MHz band. Communication is established
in a two-way full-duplex with ASK modulation at a bit rate of 110 Kbit/s. One of the
main problems in the implementation of the system was to choose the type of antenna
and its location on the PCB due to the small size constraint. The adopted solution was
the implementation of an ‘inverted-F’ printed on PCB. In figure 20, there is a picture of
the final implementation of the module. Transceiver units are mounted around the
commercial chip DR1300-DK from RFM Inc.
Fig. 20. Hybrid transceiver unit of the Micropyros system.
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RF Activities @ SI&C
5. INNOVATION AND TRANSFER PROJECTS
In addition to the basic research activities, the RF Group has been worried about the
needs in RF systems of the industrial sector, both local and international. Specifically,
the technology transfer has been done in the automotive industry. Two collaboration
projects have been carried out: the design and optimization of PCB antennas at 433
MHz; the development of a complete Remote Keyless Entry system. In the next
subsections, a resume of these projects is given.
5.1 Antenna Optimization (austriamicrosystems AG)
This project was done in austriamicrosystems AG (Graz, AUSTRIA). The objective
was to develop one easy, fast and cheap way to design antennas, both single ended
and differentially driven, at low ISM band (particularly at 433 MHz and 868.35 MHz
E.U. band but transferable at 315 MHz for the U.S. and Japan). The manufacture of the
antenna should be as cheap as possible in order to being competitive in the R.K.E.
systems market, which most automotive electronic enterprises are focusing on.
The best ones antennas for these specific applications to develop were the electrical
antenna monopole (λ/4 wire with a ground plane reference). However, its size is still
rather big to draw in a small board. Thus, even though magnetic monopole poor
radiation properties, it has been also considered due to its small size. The radiation
characteristics of both antennas, electrical antenna monopole as well as the magnetic
monopole are shown in figure 21 and 22, respectively.
Fig. 21. Single Ended Antenna Layout and their radiation characteristics
Fig. 22. Differential driven antenna layout and their radiation characteristics
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Sistemas d’Instrumentació I Comunicacions – RF Group
The following step in order to simplify the antenna design is to find out the electrical
equivalent circuit using capacitors, resistors and inductors depending onto the
geometry of the layout of the antenna. The aim was to find out an easy electrical model
of the antenna to implement it inside a cheap Pspice Simulator.
The electrical model is independent of the output impedance stage of the system. It
is possible to re-design the antenna modifying the geometric parameters.
5.2 Vehicle Remote Keyless Entry (Lear Corporation)
This project was done in the framework of a cooperation with LEAR Corp. The main
objective of the project was to develop a Remote Keyless Entry system (RKE) based
on a wireless-RF short range transceiver. In addition, an electromagnetic study for
locating in-car the transceiver units was carried out using CAD/CAE simulation tools
(XFDTD, from Rencom Inc.).
• Design & implementation of RF transmitter and transceivers
The specifications for the transmitter and transceiver circuit were 3V battery
operation, no need of external antenna, and both OOK & ASK modulation possibilities.
In addition, two prototypes working at ISM 433MHz and 868MHz were requested.
The transmitter circuit was based on a Pierce oscillator with a SAW resonator.
Circuit simulation and design optimization was performed using Advanced Design
System (Agilent Technologies). On figure 23 (a) and (b), it is shown the final hybrid
implementation.
In the case of the transceiver circuit, it was built using as a core the DR1200-DK &
DR1300-DK units from RFM Inc. Figure 23 shows the hybrid implementation of both
transmitter and transceiver circuit, the output spectrum of the transmitter when
modulated with a 1KHz input signal using the OOK scheme, and the recovery of the
received signal.
Po (dBm)
Transmission System Chain:
-20
-30
1 KHz OOK mod.
-40
-50
-60
-70
868.390
868.395
868.400
868.405
868.410
Frequency (MHz)
Fig. 23. Transmission chain. Receiver unit is based on a transceiver module.
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RF Activities @ SI&C
• In vehicle EM analysis
The objective of this task was to analyze the functionality of the RKE-RF system in a
real automotive environment. Therefore, an accurate EM model of the vehicle was
required taking into account all its relevant characteristics. The technique applied for
the study was based on the FDTD algorithm. In this context, it is the most suitable one
when illuminating objects with frequencies near to its self resonant frequencies in a
open boundaries contour conditions.
Obtained results permitted to evaluate the best location of the in-car transceiver
module. In figure 24, a graphical representation of the em field is shown.
(a)
(b)
Fig. 24: EM power density when car illuminated with a 433MHz source located at 1m
from the front right-side: (a) longitudinal cut through (b) transversal cut 3cm below the
car ceiling.
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RF Activities @ SI&C
6. PUBLICATIONS
The dissemination of the research work done in this project have been spread in
different kind of documents such as PhD dissertations, conference papers and journal
papers. Hereafter, the references to these publications are given.
a) PhD. Dissertations
PhD. Dissertation: Modeling of Integrated Passive Components for RFIC's:
Applications to VCO's design
Javier José Sieiro Córdoba
2001 Universitat de Barcelona
Sobresaliente cum laude (Premio extraordinario de doctorado)
PhD. Dissertation: Integrated Transformers and its Applications to RFIC design
José Cabanillas Costa
2002 Universitat de Barcelona
Sobresaliente cum laude
b) Publications in journals
López-Villegas, J.M.; Samitier, J.; Bausells, J.; Merlos, A.; Cané, C.; Knüchel, R.
Study of integrated RF passive components performed using CMOS and Si
micromachining technologies. (1)
Journal of Micromechanics and Microengineering, vol 7, pp 162-164 (1997)
López-Villegas, J.M.; Samitier, J.; Cané, C.; Losantos, P.; Bausells, J.
Improvement of the Quality Factor of RF Integrated Inductors by Layout Optimization
IEEE Transactions on Microwave Theory and Techniques , vol 48, pp 76-83 (2000)
Sieiro, J.J.; López-Villegas, J.M.; Cabanillas, J.; Osorio, J.A.; Samitier, J.
A Physical Frequency-Dependent Compact Model for RF Integrated Inductors
IEEE Transactions on Microwave Theory and Techniques , vol 50, pp 384-392 (2002)
c) Conference papers
López-Villegas, J.M.; Samitier, J.; Cané, C.; Losantos, P.; Bausells, J.
New Method to improve the Quality Factor of RF Inductors
XIII Design of Circuits and Integrated Systems Conference Proceedings, ISBN: 84606-8345-7
pp 274- 277 (1998), Madrid, (SPAIN)
Cabanillas, J.; Sieiro, J.; Samitier, J.; Bausells, J.; Cané, C.; López-Villegas, J.M.
Design of Silicon Micromachined Double Balanced Mixer for RF Applications
XIV Design of Circuits and Integrated Systems Conference Proceedings ISBN: 847632-424-3
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Sistemas d’Instrumentació I Comunicacions – RF Group
pp 353- 357 (1999), Palma de Mallorca (SPAIN)
Sieiro, J.; López-Villegas, J.M.; Cabanillas, J.; Samitier, J.
Accurate Physical model for designing RF and Microwave Integrated planar Inductors
30th European Microwave Conference (EuMC2000) Proceedings.
pp 59-66 (2000), Paris (FRANCE)
Cabanillas, J.; López-Villegas, J.M.; Sieiro, J.; Samitier, J.
Analysis of RF monolithic Transformers
30th European Solid State Device Research Conference (ESSDERC2000),
Proceedings
pp 456-459 (2000), Cork (IRELAND)
Sieiro, J.; López-Villegas, J.M.; Cabanillas, J.; Osorio, J.A.; Samitier, J.
A Complete Physical Frequency dependent lumped model for RF Integrated Inductors
2001 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Proceedings
pp 121-124 (2001), Phoenix (USA).
Cabanillas, J.; López-Villegas, J.M.; Sieiro, J.; Osorio, J.A.; Samitier, J.
Isolation Improvements of Silicon Double Balanced RF Mixer using Micromachining
Techniques
XVI Conference on Design of Circuits and Integrated Systems (DCIS 2001)Volumen:
Número: pp 464-467 (2001), Porto (PORTUGAL)
Sieiro, J.; Rejaei, B.; Cabanillas, J.; López-Villegas, J.M.; Burghartz, J.N.
A CAD Tool for RF Inductors Optimization
Semiconductors Advances for Future Electronics (SAFE 2001)
Pp 178-181 (2001), Veldhoven (The Netherlands)
Sieiro, J.; López-Villegas, J.M.; Rejaei, B.; Cabanillas, J.; Samitier, J.; Burghartz, J.N.
A Cad Tool for the Syntesis of Passive Devices
XVII Conference on Design of Circuits and Integrated Systems (DCIS 2002)
pp 631-636 (2002), Santander (SPAIN)
Macias, J.G.; López-Villegas, J.M.; Samitier, J.
900 MHz Flip Chip Connecting Oscillators
XVII Conference on Design of Circuits and Integrated Systems (DCIS 2002)
pp 139-143 (2002), Santander (SPAIN)
Cabanillas, J.; Dussopt, L.; López-Villegas, J.M.; Rebeiz, G.M.
A 900 MHz Low Phase Noise CMOS Quadrature Oscillator
2002 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium
pp 63-66 (2002), Seattle (USA)
Montserrat, J.; Cabruja, E.; Bausells, J.; López-Villegas, J.M.; Macias, J.G.
MCM Technology with Integrated Passive Elements on Glass Substrates for RF
Systems
4ª Conferencia de Dispositivos Electrónico, CDE-2003
pp 18 (2003) , Calella de la Costa (SPAIN)
J.M. López-Villegas, J.G. Macías, J. Cabanillas, J.J. Sieiro, J.A. Osorio, J. Samitier, J.
Bausells, J. Monserrat, E. Cabruja, “BPSK to ASK Converter for RF digital
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RF Activities @ SI&C
Communications”, 2003 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.
Digest of papers, pp 129-132 (2003), ISBN: 0-7803-7694-3
J.A. Osorio, J.G. Macias, J. Cabanillas, J.J. Sieiro, N. Vidal, J. Samitier, J.M. LópezVillegas, “New Receiver Front-End Using BPSK to ASK conversion”, Proceedings of
the 6th European Conference on Wireless Technology 2003, pp 467-469 (2003),
ISBN: 1-58053-839-8
J. Cabanillas, J.M. López-Villegas, J.J. Sieiro, J.A. Osorio, J.G. Macías, N. Vidal,
“Quadrature Signal Generation Approaches for RF Applications”, Proceedings of the
XVIII Conference on Design of Circuits and Integrated Systems, DCIS’2003 (2003), In
press.
d) Application Patents
J.M. Lopez Villegas, J. Samitier, “Method and System for the conversion of phase shift
keying signals (PSK) into amplitude shift keying signals (ASK)”, ref. PCT-ES02/00126,
organisation: Universitat de Barcelona, countries: UE, USA, JPN et al. (2002).
Lopez Villegas, J.M.; Samitier, J.; Cabanillas, J., “Analog quadrature generator
system”, ref. PCT-ES01/00497, Organisation: Universitat de Barcelona, countries:
UNE, USA, JPN (2001).
e) Invited Talks
J.M. López-Villegas, "Dispositivos pasivos integrados para aplicaciones en
radiofrecuencia", Conferencia de Dispositivos Electrónicos (CDE 2003), Calella de la
Costa, Barcelona (SPAIN), February 2003.
J.M. López-Villegas, "", DIMES Colloquia 2000-2001, Delft (THE NETHERLANDS),
November 2000.
f) PhD Thesis under development
J.G. Macias, “RF Receiver at 2.4 GHz. A new Phylosophy”
Supervisor: J.M. López-Villegas
Universitat de Barcelona, In progress
J.A. Osorio, “Development of new architectures of MPSK Front-End Receivers”
Supervisor: J.M. López-Villegas
Universitat de Barcelona, In progress.
g) Submitted publications to journals
J. Cabanillas, J.M. López-Villegas and G.M. Rebeiz, “A 900-MHz Low Phase Noise
CMOS Quadrature Oscillator “, Submitted to IEEE Journal of Solid State Circuits.
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Sistemas d’Instrumentació I Comunicacions – RF Group
J. Cabanillas, M. Straayer, J.M. López-Villegas, G.M. Rebeiz, “A Transformer-Based
Low Phase Noise CMOS Oscillator”, Submitted to IEEE Journal of Solid State Circuits.
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